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266 lines
7.3 KiB
266 lines
7.3 KiB
3 months ago
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/********************************** (C) COPYRIGHT *******************************
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* File Name : CH59x_gpio.c
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* Author : WCH
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* Version : V1.2
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* Date : 2021/11/17
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* Description
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*********************************************************************************
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* Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
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* Attention: This software (modified or not) and binary are used for
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* microcontroller manufactured by Nanjing Qinheng Microelectronics.
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*******************************************************************************/
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#include "CH59x_common.h"
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/*********************************************************************
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* @fn GPIOA_ModeCfg
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*
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* @brief GPIOA�˿�����ģʽ����
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*
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* @param pin - PA0-PA15
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* @param mode - ������������
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*
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* @return none
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*/
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void GPIOA_ModeCfg(uint32_t pin, GPIOModeTypeDef mode)
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{
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switch(mode)
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{
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case GPIO_ModeIN_Floating:
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R32_PA_PD_DRV &= ~pin;
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R32_PA_PU &= ~pin;
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R32_PA_DIR &= ~pin;
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break;
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case GPIO_ModeIN_PU:
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R32_PA_PD_DRV &= ~pin;
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R32_PA_PU |= pin;
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R32_PA_DIR &= ~pin;
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break;
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case GPIO_ModeIN_PD:
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R32_PA_PD_DRV |= pin;
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R32_PA_PU &= ~pin;
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R32_PA_DIR &= ~pin;
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break;
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case GPIO_ModeOut_PP_5mA:
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R32_PA_PD_DRV &= ~pin;
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R32_PA_DIR |= pin;
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break;
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case GPIO_ModeOut_PP_20mA:
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R32_PA_PD_DRV |= pin;
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R32_PA_DIR |= pin;
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break;
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default:
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break;
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}
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}
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/*********************************************************************
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* @fn GPIOB_ModeCfg
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*
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* @brief GPIOB�˿�����ģʽ����
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*
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* @param pin - PB0-PB23
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* @param mode - ������������
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*
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* @return none
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*/
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void GPIOB_ModeCfg(uint32_t pin, GPIOModeTypeDef mode)
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{
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switch(mode)
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{
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case GPIO_ModeIN_Floating:
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R32_PB_PD_DRV &= ~pin;
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R32_PB_PU &= ~pin;
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R32_PB_DIR &= ~pin;
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break;
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case GPIO_ModeIN_PU:
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R32_PB_PD_DRV &= ~pin;
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R32_PB_PU |= pin;
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R32_PB_DIR &= ~pin;
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break;
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case GPIO_ModeIN_PD:
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R32_PB_PD_DRV |= pin;
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R32_PB_PU &= ~pin;
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R32_PB_DIR &= ~pin;
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break;
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case GPIO_ModeOut_PP_5mA:
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R32_PB_PD_DRV &= ~pin;
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R32_PB_DIR |= pin;
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break;
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case GPIO_ModeOut_PP_20mA:
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R32_PB_PD_DRV |= pin;
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R32_PB_DIR |= pin;
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break;
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default:
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break;
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}
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}
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/*********************************************************************
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* @fn GPIOA_ITModeCfg
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*
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* @brief GPIOA�����ж�ģʽ����
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*
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* @param pin - PA0-PA15
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* @param mode - ��������
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*
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* @return none
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*/
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void GPIOA_ITModeCfg(uint32_t pin, GPIOITModeTpDef mode)
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{
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switch(mode)
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{
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case GPIO_ITMode_LowLevel: // �͵�ƽ����
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R16_PA_INT_MODE &= ~pin;
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R32_PA_CLR |= pin;
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break;
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case GPIO_ITMode_HighLevel: // �ߵ�ƽ����
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R16_PA_INT_MODE &= ~pin;
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R32_PA_OUT |= pin;
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break;
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case GPIO_ITMode_FallEdge: // �½��ش���
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R16_PA_INT_MODE |= pin;
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R32_PA_CLR |= pin;
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break;
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case GPIO_ITMode_RiseEdge: // �����ش���
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R16_PA_INT_MODE |= pin;
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R32_PA_OUT |= pin;
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break;
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default:
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break;
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}
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R16_PA_INT_IF = pin;
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R16_PA_INT_EN |= pin;
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}
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/*********************************************************************
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* @fn GPIOB_ITModeCfg
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*
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* @brief GPIOB�����ж�ģʽ����
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*
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* @param pin - PB0-PB23
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* @param mode - ��������
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*
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* @return none
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*/
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void GPIOB_ITModeCfg(uint32_t pin, GPIOITModeTpDef mode)
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{
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uint32_t Pin = pin | ((pin & (GPIO_Pin_22 | GPIO_Pin_23)) >> 14);
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switch(mode)
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{
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case GPIO_ITMode_LowLevel: // �͵�ƽ����
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R16_PB_INT_MODE &= ~Pin;
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R32_PB_CLR |= pin;
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break;
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case GPIO_ITMode_HighLevel: // �ߵ�ƽ����
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R16_PB_INT_MODE &= ~Pin;
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R32_PB_OUT |= pin;
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break;
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case GPIO_ITMode_FallEdge: // �½��ش���
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R16_PB_INT_MODE |= Pin;
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R32_PB_CLR |= pin;
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break;
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case GPIO_ITMode_RiseEdge: // �����ش���
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R16_PB_INT_MODE |= Pin;
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R32_PB_OUT |= pin;
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break;
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default:
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break;
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}
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R16_PB_INT_IF = Pin;
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R16_PB_INT_EN |= Pin;
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}
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/*********************************************************************
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* @fn GPIOPinRemap
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*
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* @brief ���蹦������ӳ��
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*
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* @param s - �Ƿ�ʹ��ӳ��
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* @param perph - RB_RF_ANT_SW_EN - RF antenna switch control output on PA4/PA5/PA12/PA13/PA14/PA15
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* RB_PIN_U0_INV - RXD0/RXD0_/TXD0/TXD0_ invert input/output
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* RB_PIN_INTX - INTX: INT24/INT25 PB8/PB9 -> INT24_/INT25_ PB22/PB23
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* RB_PIN_MODEM - MODEM: PA6/PA7 -> PB12/PB13
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* RB_PIN_I2C - I2C: PB14/PB15 -> PB14/PB15
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* RB_PIN_PWMX - PWMX: PA12/PA13 -> PA6/PA7
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* RB_PIN_SPI0 - SPI0: PA12/PA13/PA14/PA15 -> PB12/PB13/PB14/PB15
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* RB_PIN_UART3 - UART3: PA4/PA5 -> PA4/PA5
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* RB_PIN_UART2 - UART2: PB22/PB23 -> PA6/PA7
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* RB_PIN_UART1 - UART1: PA8/PA9 -> PB12/PB13
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* RB_PIN_UART0 - UART0: PB4/PB7 -> PA15/PA14
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* RB_PIN_TMR3 - TMR2: PB22 -> PB22
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* RB_PIN_TMR2 - TMR2: PA11 -> PB11
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* RB_PIN_TMR1 - TMR1: PA10 -> PB10
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* RB_PIN_TMR0 - TMR0: PA9 -> PB23
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*
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* @return none
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*/
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void GPIOPinRemap(FunctionalState s, uint16_t perph)
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{
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if(s)
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{
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R16_PIN_ALTERNATE |= perph;
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}
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else
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{
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R16_PIN_ALTERNATE &= ~perph;
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}
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}
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/*********************************************************************
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* @fn GPIOAGPPCfg
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*
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* @brief ģ������GPIO���Ź��ܿ���
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*
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* @param s - ENABLE - ����ģ�����蹦�ܣ��ر����ֹ���
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* DISABLE - �������ֹ��ܣ��ر�ģ�����蹦��
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* @param perph - RB_PIN_ADC8_9_IE - ADC/TKEY 9/8ͨ��
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* RB_PIN_ADC6_7_IE - ADC/TKEY 7/6ͨ��
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* RB_PIN_ADC10_IE - ADC/TKEY 10ͨ��
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* RB_PIN_ADC11_IE - ADC/TKEY 11 ͨ��
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* RB_PIN_USB2_DP_PU - USB2 U2D+�����ڲ���������
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* RB_PIN_USB2_IE - USB2����
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* RB_PIN_USB_DP_PU - USB UD+�����ڲ���������
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* RB_PIN_USB_IE - USB ����
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* RB_PIN_ADC0_IE - ADC/TKEY 0 ͨ��
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* RB_PIN_ADC1_IE - ADC/TKEY 1 ͨ��
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* RB_PIN_ADC12_IE - ADC/TKEY 12 ͨ��
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* RB_PIN_ADC13_IE - ADC/TKEY 13 ͨ��
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* RB_PIN_XT32K_IE - 32KHz����LSE����
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* RB_PIN_ADC2_3_IE - ADC/TKEY 2/3 ͨ��
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* RB_PIN_ADC4_5_IE - ADC/TKEY 4/5 ͨ��
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*
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* @return none
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*/
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void GPIOAGPPCfg(FunctionalState s, uint16_t perph)
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{
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if(s)
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{
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R16_PIN_ANALOG_IE |= perph;
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}
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else
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{
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R16_PIN_ANALOG_IE &= ~perph;
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}
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}
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